1. Field of the Invention
One or more embodiments of the present invention relate to a method, a medium, and apparatus for allocating memories to a plurality of processing cores and managing the memories in a multi-core system including the plurality of processing cores.
2. Description of the Related Art
Developing techniques continue to allow electronic circuits to be miniaturized, and clock cycles to be reduced. Further, improvements in circuit performance are slowing down due to an increase in power consumption of the chips, while current processor architecture increases a storage capacity of a chip. The current processor architecture is developed to work with a system on chips on which a plurality of processing cores are mounted. Methods used for various systems such as a sensor node of a sensor network, a mobile phone, a mobile terminal such as a personal digital assistant (PDA), a base station, a network router, a switching device, and the like by using the system on a chip have been developed. The processor architecture including the plurality of processing cores is referred to as a multi-core system.
In the multi-core system, it is possible to embody parallelism for concurrently performing a plurality of tasks. Accordingly, it is possible to expect considerable improvement in performance as compared with a single core system. However, the performance of the system is not improved in proportion to an increase in the number of processing cores. Accordingly, a method of effectively managing memories is necessary so as to solve a problem in performance deterioration in the multi-core system.